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DATA SHEET
TDA4867J Full bridge current driven vertical deflection booster
Preliminary specification 2003 Feb 05
Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
FEATURES * Fully integrated, few external components * Maximum 2.5 A (p-p) deflection current * No additional components in combination with the deflection controller family TDA485x and SAA4856 * Pre-amplifier with differential high CMRR current mode inputs * Low offsets * High linear sawtooth signal amplification * High efficient DC-coupled vertical output bridge circuit * High deflection frequency up to 200 Hz * Power supply and flyback supply voltage independent adjustable to optimize power consumption and flyback time * Excellent transition behaviour during flyback * Guard circuit for screen protection * Power save mode controlled by input pins (in combination with SAA4856 only) or guard pin. QUICK REFERENCE DATA SYMBOL DC supplies; note 1 VP VFB Iq(VFB) Idefl(p-p) Ii(dif) IFB(p-p) supply voltage flyback supply voltage quiescent flyback current note 2 no load; no signal 8.2 VP + 6 - 0.6 note 3 - - - - 2.5 - 500 - PARAMETER CONDITIONS MIN. TYP. GENERAL DESCRIPTION
TDA4867J
The TDA4867J is a power booster for use in colour vertical deflection systems for frame frequencies of 50 to 200 Hz. The circuit provides a high CMRR current driven differential input. Due to the bridge configuration of the two output stages DC-coupling of the deflection coil is achieved. In conjunction with the deflection controller family TDA485x and SAA4856 the ICs offer an extremely advanced system solution.
MAX.
UNIT
25 60 4
V V mA
Vertical circuit deflection current on pins OUTB and OUTA (peak-to-peak value) differential input current 2.5 600 2.5 A A A
Flyback generator maximum current during flyback on pin VFB (peak-to-peak value) guard voltage guard on
Guard circuit; note 1 VGUARD Notes 1. Voltages refer to pin GND. 2. If VFB is between 40 and 60 V a decoupling capacitor CFB = 22 F (between pin VFB and pin GND) and a resistor RFB = 100 (between pin VFB and flyback supply voltage) are required (see Fig.6). 3. Differential input current Ii(dif) = IINP - IINN. 5.5 6.2 - V
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
ORDERING INFORMATION TYPE NUMBER TDA4867J PACKAGE NAME DBS9P DESCRIPTION plastic DIL-bent-SIL power package; 9 leads (lead length 12/11 mm); exposed die pad
TDA4867J
VERSION SOT523-1
BLOCK DIAGRAM
guard output or power save mode input flyback voltage
handbook, full pagewidth
GUARD 8
VP 3
GND 5
VFB 7
TDA4867J
GUARD CIRCUIT FLYBACK GENERATOR
AMPLIFIER A INP 1
6 OUTA Rp
Idefl vertical deflection coil Rm
INPUT STAGE INN 2 from e.g. TDA485x or SAA4856
PROTECTION
9 FEEDB Rref AMPLIFIER B 4 OUTB
MGU988
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
PINNING SYMBOL INP INN VP OUTB GND OUTA VFB GUARD FEEDB PIN 1 2 3 4 5 6 7 8 9 DESCRIPTION non-inverted input inverted input supply voltage output B ground output A flyback supply voltage guard output or power save mode input feedback input Output stages
TDA4867J
In combination with the SAA4856 the power save mode can be achieved via the input pins without additional components.
The two output stages are current driven in opposite phase and operate in combination with the deflection coil in a full bridge configuration. Therefore, the TDA4867J requires no external coupling capacitor and operates with one supply voltage (VP) and a separate adjustable flyback supply voltage (VFB) only. The deflection current through the coil (Idefl) is measured with the resistor Rm which produces a voltage drop: Urm Rm x Idefl. At pin FEEDB a part of Idefl is fed back to the input stage. The feedback input has a current input characteristic which holds the differential voltage between pin FEEDB and pin OUTB on zero. Therefore the feedback current (IFEEDB) through Rref is:
handbook, halfpage
INP 1 INN 2 VP 3 OUTB 4 GND 5 OUTA 6 VFB 7 GUARD 8 FEEDB 9
MGU989
Rm I FEEDB --------- x I defl R ref The input stage directly compares the driver currents into pins INP and INN with the half of the feedback current (IFEEDB). Any difference of this comparison leads to a more or less driver current for the output stages. The relation between the deflection current and the differential input current (Ii(dif) = IINP - IINN) is: Rm I i ( dif ) = 2 x I FEEDB --------- x I defl x 2 or: R ref R ref I defl I i ( dif ) x ----------------2 x Rm The deflection current can be adjusted up to 1.25 A by varying Rref when Rm is fixed to 1 .
TDA4867J
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION The TDA4867J consists of a differential input stage, two output stages, a flyback generator, a protection circuit for the output stages and a guard circuit. Differential input stage The differential input stage has a high CMRR differential current mode input (pin INP and pin INN) that results in a high electromagnetic immunity and is especially suitable for driver units with differential (e.g. TDA485x or SAA4856) and single-ended current signals. The differential input stage delivers the driver signals for the output stages. Flyback generator The flyback generator supplies the output stage A during flyback. This makes it possible to optimize power consumption (supply voltage VP) and flyback time (flyback voltage VFB) separately. Due to the absence of a decoupling capacitor the flyback voltage is fully available. In parallel with the deflection yoke and the damping resistor (Rp) an additional capacitor (CSP) and a series resistor (RSP) have to be used. The flyback time can be optimized depending on the value of CSP.
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
Protection The output stages are protected against: * Thermal overshoot in normal operation * Short-circuit of the coil (pins OUTB and OUTA). Guard circuit The internal guard circuit provides a blanking signal for the CRT. The guard signal is active HIGH: * At thermal overshoot * During flyback * When missing flyback supply voltage * When power supply voltage too low, VP < VP(min).
TDA4867J
The internal guard circuit will not be activated, if the input signals on pins INP and INN delivered from the driver circuit are out of range or at short-circuit of the coil (pins OUTB and OUTA). For this reason an external guard circuit can be applied to detect failures of the deflection (see Fig.5). This circuit will be activated when flyback pulses are missing, which is the indication of any abnormal operation. The guard output pin can be used as input for the power save mode. A current or a voltage has to be applied to the pin. In this case the output stages are switched off completely.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages referenced to ground (pin GND); unless otherwise specified. SYMBOL VP VFB IFB VINP, VINN IINP, IINN VOUTB VOUTA VFEEDB IFEEDB VGUARD IGUARD Tstg Tamb Tj Vesd supply voltage flyback supply voltage flyback supply current input voltage input current output voltage on pin OUTB output voltage on pin OUTA note 1 feedback voltage feedback current guard voltage guard current storage temperature ambient temperature junction temperature electrostatic discharge voltage note 2 note 3 note 4 Notes 1. Maximum output currents IOUTB and IOUTA are limited by current protection. 2. Internally limited by thermal protection; will be activated for Tj 150 C. 3. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k resistor. 4. Machine model: equivalent to discharging a 200 pF capacitor through a 0.75 H inductance. PARAMETER CONDITIONS 0 0 0 0 0 0 0 0 0 0 0 0 -20 -20 -20 -4000 -250 MIN. MAX. 30 60 1.8 5 5 VP VFB 1.6 VP 5 10 5 +150 +75 +150 +4000 +250 V V A V mA V V A V mA V mA C C C V V UNIT
IOUTB, IOUTA output current
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
THERMAL CHARACTERISTICS SYMBOL Rth(j-mb) Note PARAMETER thermal resistance from junction to mounting base CONDITIONS note 1
TDA4867J
VALUE 4
UNIT K/W
1. To minimize the thermal resistance from mounting base to heatsink [Rth(mb-h)] follow the recommended mounting instruction: screw mounting preferred; torque = 40 Ncm; use heatsink compound; isolation plate increases Rth(mb-h). CHARACTERISTICS VP = 12 V; Tamb = 25 C; VFB = 40 V; voltages referenced to ground (pin GND); unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. - - 2.5 80 500 - 300 3.0 3.0 250 - - - 1.1 1.6 2.1 2.8 1.1 1.6 1.0 1.6 - 5.7 TYP. MAX. UNIT
DC supplies (pins VP and VFB) VP VFB Iq(FB) Iq(P) Ii(dif) Ii(dif)(offset) IINP, IINN Vclamp(INP) Vclamp(INN) IFEEDB VFEEDB Idefl(p-p) IOUTA, IOUTB Vsat(OUTA-GND) Vsat(VP-OUTA) supply voltage flyback supply voltage quiescent flyback current quiescent supply current note 1 no load; no signal Idefl = 0 note 2 Idefl = 0; Rref = 3 k; Rm = 1 IINP = IINN = 0; note 3 IINP = IINN = 0; note 3 8.2 VP + 6 - - - 0 0 2.7 2.7 - 1 25 60 4 130 600 20 600 3.3 3.3 300 VP - 1 2.5 1.25 1.3 1.8 2.7 3.4 1.3 1.8 1.4 2.0 2 6.3 V V mA mA A A A V V A V
Input stage (pins INP, INN and FEEDB) differential input current differential input offset current [Ii(dif)(offset) = IINP - IINN] single-ended input current input clamp voltage on pin INP input clamp voltage on pin INN feedback current feedback voltage
Output stages (pins OUTA and OUTB) deflection current (peak-to-peak value) output current saturation voltage pin OUTA to pin GND saturation voltage pin VP to pin OUTA IOUTA = 0.7 A IOUTA = 1.25 A; note 4 IOUTA = 0.7 A IOUTA = 1.25 A; note 4 Vsat(OUTB-GND) saturation voltage pin OUTB to pin GND Vsat(VP-OUTB) LE VOUTA, VOUTB saturation voltage pin VP to pin OUTB linearity error DC output voltage IOUTB = 0.7 A IOUTB = 1.25 A; note 4 IOUTB = 0.7 A IOUTB = 1.25 A; note 4 Idefl = 0.7 A; note 5 Ii(dif) = 0; closed loop 0.6 0.3 - - - - - - - - - 5.1 A A V V V V V V V V % V
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
SYMBOL Flyback generator IFB(p-p) VFB-OUTA maximum current during flyback on pin VFB (peak-to-peak value) voltage drop during flyback between pin VFB and pin OUTA reverse Idefl = -0.7 A Idefl = -1.25 A forward Idefl = 0.7 A Idefl = 1.25 A Vth(OUTA) switch-on threshold voltage on pin OUTA - - VP - 1 5.2 5.7 - - - -2.6 -3.1 - - PARAMETER CONDITIONS MIN. TYP.
TDA4867J
MAX.
UNIT
2.5
A
-3 -3.9 6.1 6.9 VP + 1
V V V V V
Guard circuit (pin GUARD) VGUARD output voltage guard on; IGUARD = -5 mA guard off; IGUARD = 0 IGUARD Vext output current external voltage guard on; VGUARD > 5 V for guard function for power save mode; IGUARD = 0.5 mA Notes 1. If VFB is between 40 and 60 V a decoupling capacitor CFB = 22 F (between pin VFB and pin GND) and a resistor RFB = 100 (between pin VFB and flyback supply voltage) are required (see Fig.6). 2. Differential input current Ii(dif) = IINP - IINN. 3. Input resistance is 500 . 4. Required VP depends on the impedance of the deflection yoke. 5. Deviation of the output slope at a constant input slope. 5 - -5 0 8.2 6 - - - - - 0.4 - 6.5 9.5 V V mA V V
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
TDA4867J
handbook, full pagewidth
IINP (A)
Driver current from TDA485x, TDA4841PS or SAA4856 on pin INP.
t (ms)
IINN (A)
Driver current from TDA485x, TDA4841PS or SAA4856 on pin INN.
t (ms) VOUTA (V) VFB VP
Output voltage on pin OUTA.
t (ms)
VOUTB (V) VP
Output voltage on pin OUTB.
t (ms)
Idefl (A) t (ms)
Deflection current through the coil.
VGUARD (V)
Output voltage on pin GUARD during normal operation.
t flb flyback time t flb depends on VFB t (ms)
MGU990
Fig.3 Timing diagram.
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
INTERNAL PIN CONFIGURATION
TDA4867J
handbook, full pagewidth
8
3
7
VP 2
6
TDA4867J
1 5
9 4
VP
MGU991
Fig.4 Internal circuits.
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
APPLICATION INFORMATION
TDA4867J
handbook, full pagewidth
VFB
VP 1N4448 2.2 k BC556 guard output, HIGH = error 3.3 k BC548 22 F 220 k
MGU992
TDA4867J
7
VFB
6
OUTA
2.2
vertical output signal
Fig.5 Application circuit for external guard signal generation.
handbook, full pagewidth
TDA4867J
1 IINP from driver circuit TDA485x or SAA4856 IINN 2 3 4 5 6 7 8 9
Rm 1
Ldeflcoil = 5.2 mH Rdeflcoil = 4.2 RSP 10 Rp CSP
(2)
guard output or power save mode input
VP 220 F
220
Rref 3.4 k
MGU993
RFB VFB
(1) (1)
CFB 100 F (VFB < 40 V)
(1) If VFB is between 40 and 60 V a resistor RFB = 100 and a capacitor CFB = 22 F are required. (2) The value of CSP is application dependent, but 10 nF minimum is required.
Fig.6 Application diagram with driver circuit TDA485x or SAA4856.
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
Example Table 1 Values given from application diagram Fig.6 VALUE 0.71 5.2 5.4 [= 4.2 + 7% + R()] 1 (+1%) 220 3.4 40 50 75 4 6 A mH k V C C K/W K/W UNIT Table 2 Calculated values VALUE 8.5 200 3.4 0.9 2.5 10 75
TDA4867J
SYMBOL VP tflb Ptot Pdefl PIC Rth(tot) Tj(max)(1) Note
UNIT V s W W W K/W C
SYMBOL Idefl Ldeflcoil Rdeflcoil Rm Rp Rref VFB Tamb Tdeflcoil Rth(j-mb) Rth(mb-amb)(1) Note
1. Tj(max) = PIC x [Rth(j-mb) + Rth(mb-amb)] + Tamb.
1. Use heatsink compound. Calculation formulae for supply voltage: Vb1 = Vsat(VP-OUTA) + Rdeflcoil x Idefl - U'L + Rm x Idefl + Vsat(OUTB-GND) Vb2 = Vsat(OUTA-GND) + Rdeflcoil x Idefl + U'L + Rm x Idefl + Vsat(VP-OUTB) for Vb1 > Vb2 : VP = Vb1 for Vb2 > Vb1 : VP = Vb2 where: U'L = Ldeflcoil x 2 x Idefl x fv fv = vertical deflection frequency. Calculation formulae for power consumption: P IC = P tot - P defl I defl P tot = V P x -------- + V P x 0.02 A + 0.1 W + V FB x I FB 2 1 2 P defl = -- x ( R deflcoil + R m ) x I defl 3 where: PIC = power dissipation of the TDA4867J Ptot = total power dissipation Pdefl = power dissipation of the deflection coil. L deflcoil V FB + ( R deflcoil + R m ) x I defl Calculation formulae for flyback time (tflb): t flb -------------------------------- x ln --------------------------------------------------------------------- V FB - ( R deflcoil + R m ) x I defl R deflcoil + R m
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
PACKAGE OUTLINE
TDA4867J
DBS9P: plastic DIL-bent-SIL power package; 9 leads (lead length 12/11 mm); exposed die pad
SOT523-1
non-concave x Eh
q1
Dh D D1 P k view B: mounting base side A2 q2
E
B
q
L2 L
L3
L1
1 Z e DIMENSIONS (mm are the original dimensions) UNIT A2(2) bp mm c D(1) D1(2) Dh E(1) Eh e e1
9 wM 0 5 scale e1 e2 k L L1 L2 L3 4.5 3.7 m 2.8 P Q q q1 q2 v 0.8 w x Z(1) 1.65 1.10 10 mm Q m e2 c vM
bp
2.7 0.80 0.58 13.2 2.3 0.65 0.48 12.8
6.2 14.7 3.0 12.4 11.4 6.7 3.5 3.5 2.54 1.27 5.08 5.8 14.3 2.0 11.0 10.0 5.5
3.4 1.15 17.5 4.85 3.8 3.1 0.85 16.3 3.6
0.3 0.02
Notes 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 2. Plastic surface within circle area D1 may protrude 0.04 mm maximum. OUTLINE VERSION SOT523-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 98-11-12 00-07-03
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds.
TDA4867J
The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. suitable suitable(1) WAVE
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Philips Semiconductors
Preliminary specification
Full bridge current driven vertical deflection booster
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
TDA4867J
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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